SELECCIÓN DE ÁNGULOS DE CONMUTACIÓN PARA UN INVERSOR MULTINIVEL EN CASCADA USANDO UN ALGORITMO DE BÚSQUEDA ALEATORIA (SWITCHING ANGLES SELECTION FOR A CASCADED MULTILEVEL INVERTER USING A RANDOM SEARCH ALGORITHM)

Jesús Aguayo Alquicira, Susana Estefany De León Aldaco, Oscar Sánchez Vargas, Nicolás Torres Cruz, Adolfo Rafael López Núñez

Resumen


Resumen
Un inversor de cascada trifásico H-Bridge de varios niveles en condiciones de fallo de un solo interruptor puede funcionar como un inversor asimétrico aplicando un cambio en la estrategia de modulación para mejorar su rendimiento. Este documento presenta el Algoritmo de Búsqueda Aleatoria aplicado a la modulación de Eliminación Selectiva de Armónicos para Inversores de Cascada Multinivel Asimétricos. El algoritmo propuesto tiene por objeto encontrar una solución óptima a un conjunto de ecuaciones trascendentales, que garantizan la eliminación de armónicos no deseados y el control de la magnitud de la componente fundamental de la tensión generada por el inversor. Además, el algoritmo propuesto se comparó con el algoritmo de optimización de enjambre de partículas y la estrategia tradicional de eliminación selectiva de armónicos. Los resultados comparativos obtenidos mostraron que la técnica de modulación que usa la técnica Algoritmo de Búsqueda Aleatoria es la más adecuada para el inversor multinivel trifásico de siete niveles (caso de estudio).
Palabras Clave: Algoritmo de búsqueda aleatoria, Eliminación selectiva de armónicos, Estrategia de tolerancia a fallos, Inversor de modulación de ancho de pulso, Inversor multinivel.

Abstract
A three-phase H-Bridge multi-level cascade inverter under Single-Switch Fault Condition can operate as an asymmetrical inverter by applying a change in the modulation strategy to improve its performance. This paper presents the Random Search Algorithm applied to the modulation of Selective Harmonic Elimination for Asymmetric Cascade Multilevel Inverters. The proposed algorithm aims to find an optimal solution to a set of transcendental equations, which guarantee the elimination of undesired harmonics and controlling the magnitude of the fundamental component of the voltage generated by the inverter. In addition, the proposed algorithm was compared with the Particle Swarm Optimization algorithm and the traditional selective harmonic elimination strategy. The comparative results obtained showed that the modulation technique using the Random Search Algorithm technique is the most suitable for the seven-level three-phase multilevel inverter (case study).
Keywords: Fault Tolerant Strategy, Pulse Width Modulation inverter, Random Search Algorithm, Selective Harmonic Elimination, Multilevel inverter.

Texto completo:

134-154 PDF

Referencias


Aleenejad, M., Ahmadi, R., & Moamaei, P. (2014, 28 Feb.-1 March 2014). Selective harmonic elimination for cascaded multicell multilevel power converters with higher number of H-Bridge modules. Paper presented at the 2014 Power and Energy Conference at Illinois (PECI).

Aleenejad, M., Mahmoudi, H., Moamaei, P., & Ahmadi, R. (2016). A New Fault-Tolerant Strategy Based on a Modified Selective Harmonic Technique for Three-Phase Multilevel Converters With a Single Faulty Cell. IEEE Transactions on Power Electronics, 31(4), 3141-3150. doi: 10.1109/TPEL.2015.2444661

Aleenejad, M., Moamaei, P., Mahmoudi, H., & Ahmadi, R. (2015, 15-19 March 2015). Unbalanced Selective Harmonic Elimination for fault-tolerant operation of three phase multilevel Cascaded H-bridge inverters. Paper presented at the 2015 IEEE Applied Power Electronics Conference and Exposition (APEC).

Bedi, P., Bansal, R., & Sehgal, P. (2013). Using PSO in a spatial domain based image hiding scheme with distortion tolerance. Computers & Electrical Engineering, 39(2), 640-654. doi: https://doi.org/10.1016/j.compeleceng.2012.12.021

Davari, P., Zare, F., & Blaabjerg, F. (2016). Pulse Pattern-Modulated Strategy for Harmonic Current Components Reduction in Three-Phase AC–DC Converters. IEEE Transactions on Industry Applications, 52(4), 3182-3192. doi: 10.1109/TIA.2016.2539922

Franquelo, L. G., Rodriguez, J., Leon, J. I., Kouro, S., Portillo, R., & Prats, M. A. M. (2008). The age of multilevel converters arrives. IEEE Industrial Electronics Magazine, 2(2), 28-39. doi: 10.1109/MIE.2008.923519

Hadjou, F., Tabbache, B., Henini, N., & Benbouzid, M. (2018, 24-25 Nov. 2018). Diagnosis of PWM Power Inverter Based on Fuzzy Logic and Concordia Current Pattern. Paper presented at the 2018 International Conference on Applied Smart Systems (ICASS).

IEEE Recommended Practice and Requirements for Harmonic Control in Electric Power Systems. (2014). IEEE Std 519-2014 (Revision of IEEE Std 519-1992), 1-29. doi: 10.1109/IEEESTD.2014.6826459

Javier, P. R., A, B. J. J., H, H. L. J., & R, U. R. F. (2018). Hybrid Modulation Strategy for Asymmetrical Cascade H-Bridge Multilevel Inverters. IEEE Latin America Transactions, 16(6), 1623-1630. doi: 10.1109/TLA.2018.8444158

Jua, L. T. H., Juan, A. R. J., Aurelio, D. G., & Juvenal, R. R. (2018). Eight Levels Multilevel Voltage Source Inverter Modulation Technique. IEEE Latin America Transactions, 16(4), 1121-1127. doi: 10.1109/TLA.2018.8362146

Kavousi, A., Vahidi, B., Salehi, R., Bakhshizadeh, M. K., Farokhnia, N., & Fathi, S. H. (2012). Application of the Bee Algorithm for Selective Harmonic Elimination Strategy in Multilevel Inverters. IEEE Transactions on Power Electronics, 27(4), 1689-1696. doi: 10.1109/TPEL.2011.2166124

Kim, S., Lee, J., & Lee, K. (2016). A Modified Level-Shifted PWM Strategy for Fault-Tolerant Cascaded Multilevel Inverters With Improved Power Distribution. IEEE Transactions on Industrial Electronics, 63(11), 7264-7274. doi: 10.1109/TIE.2016.2547917

Kumar, R., Kabamba, P. T., & Hyland, D. C. (2004, 14-17 Dec. 2004). Analysis and parameter selection for an Adaptive Random Search algorithm. Paper presented at the 2004 43rd IEEE Conference on Decision and Control (CDC) (IEEE Cat. No.04CH37601).

León-Aldaco, S. E. D., Calleja, H., & Aguayo-Alquicira, J. (2015). Metaheuristic Optimization Methods Applied to Power Converters: A Review. IEEE Transactions on Power Electronics, 30(12), 6791-6803. doi: 10.1109/TPEL.2015.2397311

N. Torres-Cruz, M. Oliver-Salazar, & J. Aguayo-Alquicira. (2015). Algoritmo de Búsqueda Aleatoria (ABA) Aplicado en Estrategia de Modulación por Eliminación Selectiva de Armónicos (SHE) para inversores Multinivel. Paper presented at the Congreso Nacional de Control Automático AMCA 2015, Cuernavaca, Morelos (México).

Nabavi-Kerizi, S. H., Abadi, M., & Kabir, E. (2010). A PSO-based weighting method for linear combination of neural networks. Computers & Electrical Engineering, 36(5), 886-894. doi: https://doi.org/10.1016/j.compeleceng.2008.04.006

Norambuena, M., Kouro, S., Dieckerhoff, S., & Rodriguez, J. (2018). Reduced Multilevel Converter: A Novel Multilevel Converter With a Reduced Number of Active Switches. IEEE Transactions on Industrial Electronics, 65(5), 3636-3645. doi: 10.1109/TIE.2017.2762628

Rodríguez-Blanco, M. A., Claudio-Sánchez, A., Theilliol, D., Vela-Valdés, L. G., Sibaja-Terán, P., Hernández-González, L., & Aguayo-Alquicira, J. (2011). A Failure-Detection Strategy for IGBT Based on Gate-Voltage Behavior Applied to a Motor Drive System. IEEE Transactions on Industrial Electronics, 58(5), 1625-1633. doi: 10.1109/TIE.2010.2098355

Taghizadeh, H., & Hagh, M. T. (2010). Harmonic Elimination of Cascade Multilevel Inverters with Nonequal DC Sources Using Particle Swarm Optimization. IEEE Transactions on Industrial Electronics, 57(11), 3678-3684. doi: 10.1109/TIE.2010.2041736

Vargas, R. A., Figueroa, A., DeLeon, S. E., Aguayo, J., Hernandez, L., & Rodriguez, M. A. (2015). Analysis of Minimum Modulation for the 9-Level Multilevel Inverter in Asymmetric Structure. IEEE Latin America Transactions, 13(9), 2851-2858. doi: 10.1109/TLA.2015.7350030

Vijeh, M., Rezanejad, M., Samadaei, E., & Bertilsson, K. (2019). A General Review of Multilevel Inverters Based on Main Submodules: Structural Point of View. IEEE Transactions on Power Electronics, 34(10), 9479-9502. doi: 10.1109/TPEL.2018.2890649






URL de la licencia: https://creativecommons.org/licenses/by/3.0/deed.es

Barra de separación

Licencia Creative Commons    Pistas Educativas está bajo la Licencia Creative Commons Atribución 3.0 No portada.    

TECNOLÓGICO NACIONAL DE MÉXICO / INSTITUTO TECNOLÓGICO DE CELAYA

Antonio García Cubas Pte #600 esq. Av. Tecnológico, Celaya, Gto. México

Tel. 461 61 17575 Ext 5450 y 5146

pistaseducativas@itcelaya.edu.mx

http://pistaseducativas.celaya.tecnm.mx/index.php/pistas