IMPLEMENTACIÓN EN FPGA DE UN GENERADOR DE TONOS DE RADIOFRECUENCIA (FPGA IMPLEMENTATION OF A RADIO FREQUENCY TONE GENERATOR)

Andrés Francisco Cabrera Machaen, Luis Arturo González Hernández, José Cruz Núñez Pérez

Resumen


Resumen
En este artículo se presenta la implementación de un diseño de radiofrecuencia en una FPGA Artix 7. Se detalla un procedimiento para la creación del sistema de radiofrecuencia utilizando Matlab-Simulink. Se describe la modelización matemática con System Generator for DSP de Xilinx y la simulación de cada componente, verificando así su funcionamiento. Los modelos se compilan en VHDL, para después ser cargados en la FPGA simulada desde el software Vivado Design Suite. Finalmente, se emula el sistema de radiofrecuencia en la tarjeta de evaluación modelo AC701 de Xilinx que contiene el FPGA Artix-7 XC7A200T-2FBG676C. Se desarrolló una interfaz gráfica para la interacción del usuario por medio de botones, barras de desplazamiento y gráficas para la modificación por software del sistema y este sincroniza cualquier frecuencia en un rango determinado por la tarjeta FPGA. Los límites para la generación de frecuencias dependen del reloj de la FPGA, la cual está en los 200MHz.
Palabras Clave: FPGA, Generador, Implementación, Radiofrecuencia, Señal, Tonos, VHDL.

Abstract
This paper presents the implementation of a radio frequency design in an Artix 7 FPGA. A procedure for the creation of the radio frequency system using Matlab-Simulink is detailed. The mathematical modeling with Xilinx System Generator for DSP and the simulation of each component is described, thus verifying its operation. The models are compiled in VHDL, and then loaded into the simulated FPGA from the Vivado Design Suite software. Finally, the RF system is emulated on the Xilinx AC701 evaluation board containing the Artix-7 XC7A200T-2FBG676C FPGA. A graphical interface was developed for user interaction by means of buttons, scrollbars and graphs for software modification of the system and this synchronizes any frequency in a range determined by the FPGA board. The limits for frequency generation depend on the FPGA clock, which is at 200MHz.
Keywords: FPGA, Generator, Implementation, Radio Frequency, Signal, Tones, VHDL.

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Referencias


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