Interferogram decodification on Nios II soft-core

Carlos Alberto Ramos López, Abimael Jiménez Pérez, Ángel Sauceda Carvajal, José Antonio Muñoz Gómez, Marco Antonio Gurrola Navarro, José Mireles Jr. García

Resumen


This paper describes the implementation of an interferogram decoding system based on a Nios II embedded microprocessor. The interferograms are obtained by using the classical Michelson Interferometer configured as the four step phase shifting profiler. This work includes the phase unwrapping solution implemented with the minimum norm method and the SoPC architecture developed with C and Verilog languages. The processing system was successfully implemented on the Nios II in a Cyclone IV FPGA. We found that the system needs an application specific hardware accelerator to improve its performance, but regardless this drawback, its capacity to unwrap is similar to other state of the art techniques.

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Referencias


K. Krupa, M. Józwik, et al., “Static and Dynamic Characterization of AIN-driven microcantilevers using optical interference”. Optics and Lasers in Engineering. Volume 47. Number 2. 2009. p211-216.

S. Jorez, A. Cornet, J.-P. Raskin, “MEMS profilometry by low coherence phase shifting interferometry: Effect of the light spectrum for high precision measurements”. Optics Communications. Volume 263. Number 1. 2006. p6-11.

K. Bulut, M. Naci, “Three-dimensional optical profilometry using a four-core optical fiber”. Optics & Laser Technology. Volume 37. Number 6. 2005. p463-469.

G.-C. Jin, N.-K. Bao, “Surface detection and 3D profilometry for microstructure using optical metrology”, Optics and Lasers in Engineering. Volume 36. Number 1. 2001. p1-9.

D. Malacara, Optical Shop Testing. 3rd edition. 2007. John Wiley & Sons. New Jersey.

D. Malacara, M. Servín, Z. Malacara, Interferogram Analysis for Optical Testing. 2nd edition. 2007. CRC Press.

N. Syakrani, T. Mengko, A. Suksmono, E. Baskoro, “Comparison of PUMA and CUNWRAP to 2-D phase unwrapping”. Electrical Engineering and Informatics. July 2011. p1-16.

R. Hsu, S. Chen, A. Jain, C. Mercer, “Local weight selection for two-dimensional phase unwrapping”. Proceedings on ICIP 99. Volume 3. 1999. p871-875.

H. Zhong, J. Tang, D. Liu, “A fast phase unwrapping algorithm based on minimum discontinuity by blocking”. Future Computer and Communication (ICFCC) 2010. Volume 1. May 2010. p717-721.

D. Ghiglia, M. Pritt, Two-dimensional phase unwrapping: theory, algorithms, and software. 1998. Wiley. Michigan.

P. Chu, Embedded SoPC design with Nios II processor and VHDL examples. September 2011. Wiley. 736 pages.

R. Couturier, S. Domas, G. Goavec-Merou, M. Favre, M. Lenczer, A. Meister, “A cost effective AFM setup, combining interferometry and FPGA”. Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE). April 2013. p1-6.

S. Braganza, Phase unwrapping on reconfigurable hardware and graphics processors. 2008. Electrical and Computer Engineering Master’s Theses. Northeastern University.




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